Makefile Syntax
target: dependencies
commandsExample Makefile
build:
gcc -o program main.c
clean:
rm -f program
all: buildRunning
make
make target
make -f custom.mkAdvertisement
Last updated: January 2026
Makefile usage
target: dependencies
commandsbuild:
gcc -o program main.c
clean:
rm -f program
all: buildmake
make target
make -f custom.mk